Stepped wafers have been adopted at present to reduce warpage or deflection of semiconductor wafers 300 μm or less in thickness. The stepped wafers refer to semiconductor wafers with rear surface whose center portion is formed thinner than its outer periphery.
Steep stepped portions (side surfaces of depressions) of the stepped wafers have a negative effect on lithography processes or dicing processes. To address such a problem, techniques for forming a slope from the outside of a stepped wafer (closer to the outer periphery) to the inside thereof (closer to the center portion) have been conventionally proposed as a replacement for the steep stepped portions (see, for example, Patent Documents 1 and 2).